1. Field of the Invention
The invention relates to a quad flat no-lead package and manufacturing method thereof, more particularly, to a quad flat no-lead package and manufacturing method thereof having a lead frame with universal applicability and applicable to a variety of chip sizes and pin configurations for increasing the pin counts.
2. Description of the Prior Art
Quad flat no-lead packages are widely applied in semiconductor chip packaging due to their low cost, the ability to be applied in the surface mount technology (SMT) of the printed circuit board, and the smaller thickness. However, since the contact pads of the QFN package are disposed around the edges of the package, and the spacing between the contact pads is limited to a certain degree due to the capability restriction of the surface mount technology, the quantity of the contact pads cannot be effectively increased within a certain package footprint area. In other words, increasing the number of pins would increase the package footprint area, which restricts the application of QFN packages in high pin-count packages. In addition, different designs are required for the lead frames to comply with various chip sizes; thus the lead frames are incapable for universal use or modularization so that flexibility in design and manufacturing is lacking.
To meet the requirements of lightness, thinness and compactness for the present products, it has long been a goal of research in semiconductor packaging to achieve the maximum performance within a limited packaging space. Therefore, increasing the quantity of the contact pads without affecting the packaging area/volume has become an important topic for research in the field of semiconductor packaging. Furthermore, modularization and universal applicability of the design in the packages have also become the trend in this field.